Intel Senior Analog Design Engineer in Santa Clara, California

Job Description

Intel's SDG Central IP team is looking for an Experienced Analog Design Engineer to contribute towards NextGen Server Memory IO Design DDR5 for Intel's High-Performance Server Microprocessors. Responsibilities include technology path finding, specification, analog circuit design, custom analog layout supervision, documentation, DFT/DFM and post silicon validation of analog and mixed signal circuits. Analog design responsibilities may consist of but not limited to high speed transmitters and receivers, equalizers, filters, high performance low-jitter clocking, on-die voltage regulators and references, signal integrity analysis, system level modeling and other elements necessary to design, verify and productize high performance analog solutions. Additional responsibilities include mentoring junior designers, collaborating with other design disciplines, and contributing to design reviews. Creativity, discipline and velocity are equally valued in this team. Minimal travel may be required.

Qualifications

Successful candidate should possess a graduate degree in Electrical Engineering with 10+ B.S., 8+ M.S. or 5+ Ph.D. years of Analog Design experience. Deep understanding of VLSI Analog circuit design, trade-offs and broad knowledge in I/O architecture and Systems is essential. Ability to work independently and providing mentor-ship and guidance to junior engineers is expected. Good written and oral communication skills are extremely important. Familiarity with design tools and flows e.g. Cadence are required. Knowledge of high-speed IO signaling, transmission line theory, power delivery, power and signal integrity concepts is essential. Cross-discipline knowledge in any of these areas, such as Analog integration, RTL/System Verilog, Static timing analysis concepts, APR, Floor-planning, Metal-routing, Power-grid, Memory IO training MRC, HAS/MAS specification documentation, Matlab, Scripting are a plus.

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Other Locations

US, Massachusetts, Hudson

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